From ecfbb7246a4095750a98a0f44d7f1355ed2f9645 Mon Sep 17 00:00:00 2001
From: ahmedk <karim.ahmed@xfel.eu>
Date: Fri, 25 Mar 2022 10:01:16 +0100
Subject: [PATCH] only go to default value for SPB and MID and correct PSC
 source

---
 src/cal_tools/agipdlib.py | 22 +++++++++++++++-------
 1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/src/cal_tools/agipdlib.py b/src/cal_tools/agipdlib.py
index 30b2cc158..86e42b145 100644
--- a/src/cal_tools/agipdlib.py
+++ b/src/cal_tools/agipdlib.py
@@ -192,11 +192,16 @@ class AgipdCtrl:
         if "AGIPD1M" in karabo_id_control:
             voltage_src = (
                 f"{karabo_id_control[:-1]}/PSC/HV",
-                f"channels.U{module}.measurmentSenseVoltage.value")
+                f"channels.U{module}.measurementSenseVoltage.value")
+            # TODO: Validate if removing this and depend on adding voltage value
+            # from the Notebook's first cell.
+            default_voltage = 300
         else:  # AGIPD500K
             voltage_src = (
                 f"{karabo_id_control}/FPGA/M_{module}",
                 "highVoltage.actual.value")
+            default_voltage = None
+
 
         if (
             voltage_src[0] in self.run_dc.all_sources and
@@ -206,12 +211,15 @@ class AgipdCtrl:
         else:
             # TODO: Validate if removing this and
             # and using NB value for old RAW data.
-            print(
-                "WARNING: Unable to read bias_voltage from"
-                f" {voltage_src[0]}/{voltage_src[1].replace('.','/')} "
-                "Returning 300 as default bias voltage value."
-            )
-            return 300
+            error = ("ERROR: Unable to read bias_voltage from"
+            f" {voltage_src[0]}/{voltage_src[1].replace('.','/')}.")
+
+            if default_voltage:
+                print(f"{error} Returning {default_voltage} "
+                "as default bias voltage value.")
+            else:
+                raise ValueError(error)
+            return default_voltage
 
     def get_integration_time(self) -> int:
         """Read integration time from the FPGA device.
-- 
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