From f4807d4bc037cdbf4a8805651dd1263865490f06 Mon Sep 17 00:00:00 2001
From: Cyril Danilevski <cyril.danilevski@xfel.eu>
Date: Fri, 14 Feb 2025 20:21:37 +0100
Subject: [PATCH 1/4] Add channels for all 4 modules in DEPFET quadrant
---
powerproc.cpp | 50 ++++++++++++++++++++++++++++++++++++++++----------
1 file changed, 40 insertions(+), 10 deletions(-)
diff --git a/powerproc.cpp b/powerproc.cpp
index 3264c4c..1dbfd25 100644
--- a/powerproc.cpp
+++ b/powerproc.cpp
@@ -8,25 +8,55 @@ PowerProcedure::PowerProcedure(const IPAddress& ipAddr)
stages[0].name = "ASICS";
stages[0].type = SWITCH;
- stages[0].size = 9;
- stages[0].channels = new int[stages[0].size]{508, 708, 502, 503, 504, 501, 507, 607, 608};
+ stages[0].size = 15;
+ stages[0].channels = new int[stages[0].size]{
+ 508, 708, // MBJT
+ 503, 504, // AM, RB
+ 502, 506, 602, 606, // RB
+ 501, 505, 601, 605, // IOB
+ 507, 607, 608 // IOBA
+ };
stages[1].name = "HV";
stages[1].type = SWITCH;
- stages[1].size = 10;
- stages[1].channels = new int[stages[1].size]{1, 2, 101, 103, 102, 104, 105, 106, 107, 108};
+ stages[1].size = 40;
+ stages[1].channels = new int[stages[1].size]{
+ 1, 2, 3, 4, 5, 6, 7, 8, // IS
+ 101, 103, 102, 104, // M1 RING1
+ 113, 114, 115, 116, // M2 RING1
+ 213, 214, 215, 216, // M3 RING1
+ 201, 203, 202, 204, // M4 RING1
+ 105, 106, 107, 108, // M1 BACK
+ 109, 110, 111, 112, // M2 BACK
+ 209, 210, 211, 212, // M3 BACK
+ 205, 206, 207, 208, // M4 BACK
+ };
stages[2].name = "ISVOLTAGE";
stages[2].type = VOLTAGE;
- stages[2].size = 2;
- stages[2].channels = new int[stages[2].size]{1, 2};
- stages[2].onValue = new float[stages[2].size]{10, 10};
- stages[2].offValue = new float[stages[2].size]{2.5, 2.5};
+ stages[2].size = 8;
+ stages[2].channels = new int[stages[2].size]{
+ 1, 2, // M1
+ 3, 4, // M2
+ 5, 6, // M3
+ 7, 8 // M4
+ };
+ stages[2].onValue = new float[stages[2].size]{10, 10, 10, 10, 10, 10, 10, 10};
+ stages[2].offValue = new float[stages[2].size]{2.5, 2.5, 2.5, 2.5, 2.5, 2.5, 2.5, 2.5};
stages[3].name = "PLCSOURCE";
stages[3].type = SWITCH;
- stages[3].size = 9;
- stages[3].channels = new int[stages[3].size]{701, 801, 802, 803, 804, 301, 302, 303, 304};
+ stages[3].size = 36;
+ stages[3].channels = new int[stages[3].size]{
+ 701, 801, 802, 803, 804, // M1 PLC
+ 702, 805, 806, 807, 808, // M2 PLC
+ 703, 901, 902, 903, 904, // M3 PLC
+ 704, 905, 906, 907, 908, // M4 PLC
+ 301, 302, 303, 304, // M1 SG
+ 305, 306, 307, 308, // M2 SG
+ 401, 402, 403, 404, // M3 SG
+ 405, 406, 407, 408, // M4 SG
+ };
}
PowerProcedure::~PowerProcedure() {
--
GitLab
From 4e1ffb0f753dff55159a39510938cfbbbe19061a Mon Sep 17 00:00:00 2001
From: Cyril Danilevski <cyril.danilevski@xfel.eu>
Date: Mon, 17 Feb 2025 15:04:47 +0100
Subject: [PATCH 2/4] Fix underflow on power down sequence
---
rest.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/rest.cpp b/rest.cpp
index 61af9a2..2f1b0ae 100644
--- a/rest.cpp
+++ b/rest.cpp
@@ -241,7 +241,7 @@ void powerAllOff() {
if (success) {
PINS.ramping = true;
- for (uint8_t groupIdx = pproc.stagesCount - 1; groupIdx >= 0; groupIdx--) {
+ for (int8_t groupIdx = pproc.stagesCount - 1; groupIdx >= 0; groupIdx--) {
group = pproc.stages[groupIdx].name;
groups += group;
groups += ",";
--
GitLab
From 86bd6a4716ebae737fbba301ee075b34566f8d8d Mon Sep 17 00:00:00 2001
From: Cyril Danilevski <cyril.danilevski@xfel.eu>
Date: Mon, 17 Feb 2025 18:52:03 +0100
Subject: [PATCH 3/4] Resend commands on power sequence when no feedback after
N polls
---
mpod.cpp | 23 ++++++++++++++++++++++-
mpod.hpp | 1 -
2 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/mpod.cpp b/mpod.cpp
index 86030b7..1190c9c 100644
--- a/mpod.cpp
+++ b/mpod.cpp
@@ -221,13 +221,34 @@ void setChannelStateAndWait(const IPAddress *ipAddr, const uint16_t channel, con
snmp.loop();
// Poll channel until it's settled
+ uint8_t loopCount = 0;
+ bool ramping = true;
+ bool settingChannelState = true;
do {
SNMP::Message *snmp_msg = mpod.read(channel);
snmp.send(snmp_msg, *ipAddr, SNMP::Port::SNMP);
delete snmp_msg;
+
delay(MPOD_UPDATE_LATENCY);
snmp.loop();
- } while (mpod.isOn() != (bool)output || mpod.isRampingDown() || mpod.isRampingUp());
+ loopCount += 1;
+ ramping = (mpod.isRampingUp() || mpod.isRampingDown());
+ if (!ramping) {
+ if (mpod.isOn() == (bool)output) {
+ settingChannelState = false;
+ } else if (loopCount >= 5) {
+ // Resend set command
+ Serial.print("!Resend command to ");
+ Serial.println(channel);
+ SNMP::Message *snmp_msg = mpod.setChannelState(channel, output);
+ snmp.send(snmp_msg, *ipAddr, SNMP::Port::SNMP);
+ delete snmp_msg;
+ delay(MPOD_UPDATE_LATENCY);
+ snmp.loop();
+ loopCount = 0;
+ }
+ }
+ } while (settingChannelState);
}
void setChannelVoltageAndWait(const IPAddress *ipAddr, const uint16_t channel,
diff --git a/mpod.hpp b/mpod.hpp
index 639d993..8ecd78f 100644
--- a/mpod.hpp
+++ b/mpod.hpp
@@ -59,7 +59,6 @@ class MPOD {
}
};
- // Create an SNMP SETREQUEST message to setup MPOD
MPOD();
SNMP::Message* read(const uint16_t);
SNMP::Message* setChannelState(const uint16_t, const bool);
--
GitLab
From ef8b9f0e54b02f17accfe1a4bd3e5da429309582 Mon Sep 17 00:00:00 2001
From: Cyril Danilevski <cyril.danilevski@xfel.eu>
Date: Tue, 18 Feb 2025 18:06:22 +0100
Subject: [PATCH 4/4] Fix DEPFET channel order
---
powerproc.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/powerproc.cpp b/powerproc.cpp
index 1dbfd25..aa5fc68 100644
--- a/powerproc.cpp
+++ b/powerproc.cpp
@@ -25,7 +25,7 @@ PowerProcedure::PowerProcedure(const IPAddress& ipAddr)
101, 103, 102, 104, // M1 RING1
113, 114, 115, 116, // M2 RING1
213, 214, 215, 216, // M3 RING1
- 201, 203, 202, 204, // M4 RING1
+ 201, 202, 203, 204, // M4 RING1
105, 106, 107, 108, // M1 BACK
109, 110, 111, 112, // M2 BACK
209, 210, 211, 212, // M3 BACK
--
GitLab