From 2ee31773d89e716b2852652da9b999ef4ae3ccb9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Lo=C3=AFc=20Le=20Guyader?= <loic.le.guyader@xfel.eu> Date: Thu, 7 Nov 2019 19:32:24 +0100 Subject: [PATCH] Fix delay claculation in DSSC1module.py --- DSSC1module.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/DSSC1module.py b/DSSC1module.py index 380e0c9..b053da1 100644 --- a/DSSC1module.py +++ b/DSSC1module.py @@ -106,7 +106,7 @@ class DSSC1module: except: self.delay_mm = 0*self.nrj self.t0 = t0 - self.delay_ps = tb.positionToDelay(self.delay_mm, origin=self.t0) + self.delay_ps = tb.positionToDelay(self.delay_mm, origin=self.t0, invert=True) def collect_dssc_module_file(self): """ Collect the raw DSSC module h5 files. -- GitLab